PIC16F74-E/ML【PDF 72/104 页】IC MCU FLASH 4KX14 A/D 44QFN

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Sheet目录3882

68页 69页 70页 71页 [72页]73页 74页 75页 76页

Micrel, Inc.

KSZ8851-16MLLJ

March 2010

M9999-030210-1.0

RXQ Command Register (0x82 – 0x83): RXQCR (Continued)

Bit

Default Value

R/W

Description

2-1

Reserved.

0x0

RRXEF Release RX Error Frame

When this bit is written as 1, the current RX error frame buffer is released.

Note: This bit is self-clearing after the frame memory is released. The software should

wait for the bit to be cleared before processing new RX frame.

TX Frame Data Pointer Register (0x84 – 0x85): TXFDPR

The value of this register determines the address to be accessed within the TXQ frame buffer. When the AUTO increment

is set, It will automatically increment the pointer value on write accesses to the data register.

The counter is incremented by one for every byte access, by two for every word access, and by four for every double

word access.

Bit

Default Value

R/W

Description

Reserved.

0x0

TXFPAI TX Frame Data Pointer Auto Increment

When this bit is set, the TX Frame data pointer register increments automatically on

accesses to the data register. The increment is by one for every byte access, by two for

every word access, and by four for every doubleword access.

When this bit is reset, the TX frame data pointer is manually controlled by user to access

the TX frame location.

13-11

Reserved.

10-0

0x000

TXFP TX Frame Pointer

TX Frame Pointer index to the Frame Data register for access.

This field reset to next available TX frame location when the TX Frame Data has been

enqueued through the TXQ command register.

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